第六章 Sequential Circuits (2/2), 6-9 Chapter Summary, 第七章 Registers & Register Transfers, 7-1 Registers and Load Enable, 7-2 Register Transfers, 7-3 Register Transfer Operations, 7-4 A Note for VHDL and? Verilog Users Only, 7-5 Microoperations, 7-6 Microoperatrions on a Single Register, 7-7 Register Cell Design, 7-8 Multiplexer and Bus-Based Transfer for Multiple Registers, 7-9 Serial Transfer and Microoperations, 7-10HDL Representation for Shift Registes and Counters— VHDL, 7-11HDL Representation for Shift Registes and Counters— Verilog, 7-12 Chapter Summar